/**************************************************************************
 *  Copyright (C) 2008 - 2010 by Simon Qian                               *
 *  SimonQian@SimonQian.com                                               *
 *                                                                        *
 *  Project:    Versaloon                                                 *
 *  File:       interfaces.h                                              *
 *  Author:     SimonQian                                                 *
 *  Versaion:   See changelog                                             *
 *  Purpose:    interfaces header file                                    *
 *  License:    See license                                               *
 *------------------------------------------------------------------------*
 *  Change Log:                                                           *
 *      YYYY-MM-DD:     What(by Who)                                      *
 *      2008-11-07:     created(by SimonQian)                             *
 **************************************************************************/

// Core config for clocks
#ifndef CORE_CLKEN
#	define CORE_CLKEN						(M45X_CLK_HIRC | M45X_CLK_LIRC)
#endif
#ifndef CORE_HCLKSRC
#	define CORE_HCLKSRC						M45X_HCLKSRC_HIRC
#endif
#ifndef CORE_PCLKSRC
#	define CORE_PCLKSRC						M45X_PCLKSRC_HCLK
#endif
#ifndef CORE_PLLSRC
#	define CORE_PLLSRC						M45X_PLLSRC_NONE
#endif
#ifndef OSC0_FREQ_HZ
#	define OSC0_FREQ_HZ						(12 * 1000 * 1000)
#endif
#ifndef OSC32_FREQ_HZ
#	define OSC32_FREQ_HZ					0
#endif
#ifndef CORE_PLL_FREQ_HZ
#	define CORE_PLL_FREQ_HZ					(144 * 1000 * 1000)
#endif
#ifndef CPU_FREQ_HZ
#	define CPU_FREQ_HZ						(22 * 1000 * 1000)
#endif
#ifndef HCLK_FREQ_HZ
#	define HCLK_FREQ_HZ						CPU_FREQ_HZ
#endif
#ifndef PCLK_FREQ_HZ
#	define PCLK_FREQ_HZ						(22 * 1000 * 1000)
#endif
#ifndef CORE_VECTOR_TABLE
#	define CORE_VECTOR_TABLE				(0x00000000)
#endif

#define IFS_FLASH_EN						0
#define IFS_USART_EN						0
#define IFS_SPI_EN							0
#define IFS_ADC_EN							0
#define IFS_GPIO_EN							1
#define IFS_I2C_EN							1
#define IFS_PWM_EN							0
#define IFS_MICROWIRE_EN					0
#define IFS_TIMER_EN						0
#define IFS_EINT_EN							0
#define IFS_EBI_EN							0
#define IFS_SDIO_EN							0
#define IFS_USBD_EN							0
#define IFS_OHCI_EN							0



#define USART_NUM							4
#define USART0_INT_EN						0
#define USART1_INT_EN						1
#define USART2_INT_EN						0
#define USART3_INT_EN						0
#define USART00_ENABLE						0
#	define USART00_CTS_ENABLE				0
#	define USART00_RTS_ENABLE				0
#	define USART00_TX_ENABLE				0
#	define USART00_RX_ENABLE				0
#	define USART00_CK_ENABLE				0
#define USART10_ENABLE						0
#	define USART10_CTS_ENABLE				0
#	define USART10_RTS_ENABLE				0
#	define USART10_TX_ENABLE				0
#	define USART10_RX_ENABLE				0
#define USART01_ENABLE						0
#	define USART01_CTS_ENABLE				0
#	define USART01_RTS_ENABLE				0
#	define USART01_TX_ENABLE				0
#	define USART01_RX_ENABLE				0
#define USART11_ENABLE						1
#	define USART11_CTS_ENABLE				0
#	define USART11_RTS_ENABLE				0
#	define USART11_TX_ENABLE				1
#	define USART11_RX_ENABLE				1
#define USART02_ENABLE						0
#	define USART02_CTS_ENABLE				0
#	define USART02_RTS_ENABLE				0
#	define USART02_TX_ENABLE				0
#	define USART02_RX_ENABLE				0
#define USART12_ENABLE						0
#	define USART12_CTS_ENABLE				0
#	define USART12_RTS_ENABLE				0
#	define USART12_TX_ENABLE				0
#	define USART12_RX_ENABLE				0
#define USART03_ENABLE						0
#	define USART03_CTS_ENABLE				0
#	define USART03_RTS_ENABLE				0
#	define USART03_TX_ENABLE				0
#	define USART03_RX_ENABLE				0
#define USART13_ENABLE						0
#	define USART13_CTS_ENABLE				0
#	define USART13_RTS_ENABLE				0
#	define USART13_TX_ENABLE				0
#	define USART13_RX_ENABLE				0
